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DAC_dtmf.asm Source Code
retlw .42 ;1488.1
1477
.75%
endif
if _16_steps & Fosc_8000000
;
;*************************************************************************
;
; Delay Calculation for Frequency Generation
; Fosc = 8MHz #steps = 16
;
; X = Fosc / ( 4 * #steps * Ftone)
;
;
F_Low_table
addwf PCL,F
;X Actual Desired %Error
retlw .133 ;939.8 941 .12%
retlw .179 ;698.3 697 .19%
retlw .179 ;698.3 697 .19%
retlw .179 ;698.3 697 .19%
retlw .162 ;771.6 770 .21%
retlw .162 ;771.6 770 .21%
retlw .162 ;771.6 770 .21%
retlw .147 ;850.3 852 .19%
retlw .147 ;850.3 852 .19%
retlw .147 ;850.3 852 .19%
retlw .179 ;698.3 697 .19%
retlw .162 ;771.6 770 .21%
retlw .147 ;850.3 852 .19%
retlw .133 ;939.8 941 .12%
retlw .133 ;939.8 941 .12%
retlw .133 ;939.8 941 .12%
F_High_table
addwf PCL,F
;X Actual
retlw .94
retlw .103
retlw .94
retlw .85
retlw .103
retlw .94
retlw .85
retlw .103
retlw .94
retlw .85
Desired
;1329.8 1336
;1213.6 1209
;1329.8 1336
;1470.6 1477
;1213.6 1209
;1329.8 1336
;1470.6 1477
;1213.6 1209
;1329.8 1336
;1470.6 1477
%Error
.47%
.37%
.47%
.43%
.37%
.47%
.43%
.37%
.47%
.43%
retlw .77
retlw .77
retlw .77
retlw .77
;1623.4 1633
;1623.4 1633
;1623.4 1633
;1623.4 1633
.59%
.59%
.59%
.59%
;
;
;
;
may
may
may
may
run
run
run
run
out
out
out
out
of
of
of
of
tcy
tcy
tcy
tcy
and
and
and
and
be
be
be
be
too
too
too
too
slow
slow
slow
slow
retlw .103
retlw .85
;1213.6 1209
;1470.6 1477
.37%
.43%
endif
if _16_steps & Fosc_3570000
;
;*************************************************************************
;
; Delay Calculation for Frequency Generation
? 2004 Microchip Technology Inc.
DS51523A-page 35
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